Turn the meter on if it has a separate power switch. When multimeter measures resistance in ohms, it can not measure continuity because resistance and continuity are opposites. When there is little resistance, there will be a great deal of continuity, and vice versa. With this in mind, you can make assumptions about continuity based on the resistance values measured.
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This device works with dual supplies, a control input for the control circuitry and a power input as low as 1. The uP delivers high-current and ultra-low-drop output voltage as low as 0. The uP features comprehensive control and protection functions: a power on reset POR circuit for monitoring both control and power inputs for proper operation; an EN input for enabling or disabling the device, a power OK with time delay for indicating the output voltage status, a foldback current limit function, and a thermal shutdown function.
Desktop PCs, Notebooks, and Workstations? Graphic Cards? Low Voltage Logic Supplies? Microprocessor and Chipset Supplies? Split Plane Microprocessor Supplies? Advanced Graphics Cards Supplies? SoundCards and Auxiliary Power Supplies? Works with 1. Adjustable Output Voltage, Down to 0. Excellent Line and Load Regulation? Very Low On-Resistance? Low Reverse Leakage Output to Input? Fast Transient Response? Low External Component Count? Low Cost and Easy to Use?
Enable Pin? EN Enable Input. Pulling this pin below 0. Input Voltage. This is the drain input to the power device that supply current to the output pin. VIN Large bulk capacitors with low ESR should be placed physically close to this pin o prevent the input rail from dropping during large load transient. A 10uF ceramic capacitor is recommended at this pin.
This pin provides bias voltage to the control circuitry and driver for the pass transistor. For the device to regulate, the voltage on this pin must be at least 1. Not Internally Connected. Output Voltage. This pin is power output of the device. To maintain adequate transient response to large load change, typical value of uF Al electrolytic capacitor with 10uF ceramic capacitors are recommended to reduce the effects of current transients on VOUT.
This pin is the inverting input to the error amplifier. GND Ground. The exposed pad acts the dominant power dissipation path and should be soldered to well design PCB pads as described in the Application Informations Chapter.
Dropout voltage is affected by junction temperature, load current and minimum input supply requirements. Line Regulation The change in output voltage for a change in input voltage. The measurement is made under conditions of low dissipation or by using pulse techniques such that average chip temperature is not significantly affected. Load Regulation The change in output voltage for a change in load current at constant chip temperature. Maximum Power Dissipation The maximum total device dissipation for which the regulator will operate within specifications.
Initialization The uP automatically initiates upon the receipt of supply voltage and power voltage. This commands the use of 0. Typical application of 2. If the output continuously demands more current than the maximum current, output voltage will eventually drops below its nominal value.
This, in turns, will lower its OCP threshold level. This will limit power dissipation in the device when over current limit happens. The power dissipation is near zero when the output is short circuited to ground.
Pulling VEN lower than 0. RDS ON turns on to pull output voltage to ground. Pulling VEN higher than 2. The uP features soft start function that limits inrush current for charging the output capacitors. The soft start time is typically 2. Output Voltage Programming Figure 1 shows a typical application of 2. The output voltage is sensed through a voltage divider and regulated to internal reference voltage VREF. These are for stress ratings.
Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. Devices are ESD sensitive. Handling precaution recommended. Note 3. Note 4. The device is not guaranteed to function outside its operating conditions. Output Short Circuit 2V 1.
Dropout Voltage vs. Input Voltage 80 70 60 50 40 30 20 10 0 2. Input Voltage 0 2. FB Voltage vs. Temperature 0. F00, File Name: uPDS-F uP Application Information The uP is a high performance linear regulator specifically designed to deliver up to 3A output current with very low input voltage and ultra low dropout voltage. With dual-supply configuration, the uP operates with a wide input voltage VIN range from 1.
N-Channel MOSFET provides lower on-resistance and better stability meeting stringent requirements of current generation microprocessors and other sensitive electronic devices. It is highly recommended to bias the device with 5V voltage source if available.
Use a minimum 0. The typical application circuit shown in Figure 1 was tested with a wide range of different capacitors. This allows for the device being some distance from any bulk capacitance on the rail. Additionally, bulk capacitance may be added closely to the input supply pin of the uP to ensure that VIN does not sag, improving load transient response. Output capacitor: A minimum bulk capacitance of 33uF, along with a 0.
Increasing the bulk capacitance will improve the overall transient response. The use of multiple lower value ceramic capacitors in parallel to achieve the desired bulk capacitance will not cause stability issues.
Although designed for use with ceramic output capacitors, the uP is extremely tolerant of output capacitor ESR values and thus will also work comfortably with tantalum output capacitors. Thermal Consideration The uP integrates internal thermal limiting function to protect the device from damage during fault conditions.
However, continuously keeping the junction near the thermal shutdown temperature may remain possibility to affect device reliability. It is highly recommended to keep the junction temperature below the recommended operation condition OC for maximum reliability. Large power dissipation may cause considerable temperature raise in the regulator in large dropout applications.
The geometry of the package and of the printed circuit board PCB greatly influence how quickly the heat is transferred to the PCB and away from the chip. The case point of uPI Semiconductor Corp. Copper plane under the exposed pad is an effective heatsink and is useful for improving thermal conductivity. Recommended PCB Layout. Layout Consideration 1. Place a local bypass capacitor as closed as possible to the VIN pin. Use short and wide traces to minimize parasitic resistance and inductance.
The exposed pad should be soldered on GND plane with maximum area and with multiple vias to inner layer of ground place for improved thermal performance. Connect voltage divider directly to the point where regulation is required.
Place voltage divider close to the device. Represents theoretical exact dimension or dimension target MIN: Minimum dimension specified. MAX: Maximum dimension specified. REF: Reference. Represents dimension for reference use only. This value is not a device specification.
UP7706U8 Datasheet PDF - ETC
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